Greenray TCXOs are designed for communications, instrumentation, low orbit, aerospace, deep space and military & defense applications. Our TCXOs feature temperature stabilities of 1ppm or less and are available in a variety of packages, including SMT, and are available from 20 KHz to 1 GHz.We incorporate leading-edge design and innovative manufacturing techniques to produce extremely rugged oscillators that are ideal for mobile and airborne applications, including smart munitions. Key examples of our TCXO product line follow. For detailed information, Product Data Sheets (pdf file format) are provided.
Items |
![]() T1215 TXCO 750 Kilohertz (kHz) to 800 Megahertz (MHz) Frequency Temperature-Compensated Crystal Oscillator |
![]() T1220 TCXO 10 to 50 Megahertz (MHz) Frequency Temperature-Compensated Crystal Oscillator |
![]() T1221 TCXO 10 to 50 Megahertz (MHz) Frequency Temperature-Compensated Crystal Oscillator |
![]() T1241 TCXO 50 to 100 Megahertz (MHz) Frequency Temperature-Compensated Crystal Oscillator |
![]() T1243 TCXO 10 to 50 Megahertz (MHz) Frequency Temperature-Compensated Crystal Oscillator |
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Description | N/A Greenray Industries' T1215 TCXO offers outstanding, reliable performance under high shock & vibration conditions | N/A Greenray Industries' T1220 TCXO offers OCXO-like frequency vs. temperature stability performance in a smaller, rugged package. In addition, the T1220 performs over a wide temperature range with low power consumption. |
N/A
T1221 - TCXO Dual Compensation; Tight Stability Frequency Range: 10 MHz - 50 MHz Output Signal: C Sinewave 12.70 x 20.32 x 10.92 mm |
N/A Greenray Industries' T1241 TCXO offers ultra low acceleration sensitivity for reliable phase noise performance in high vibration and shock sensitive applications. Under high shock and vibration conditions the T1241 offers superior phase noise performance and features a rugged, go-anywhere package. | N/A Greenray Industries' T1243 TCXO delivers ultra-low acceleration sensitivity and low phase noise performance. | |||||
Brands | N/A Greenray | |||||||||
Minimum Nominal Frequency at 25 Degrees Celsius (ºC) Temperature Set Point | N/A | N/A | N/A | N/A | N/A 10 MHz | |||||
Minimum Frequency | N/A | N/A | N/A 10 MHz | N/A | N/A | |||||
Maximum Frequency | N/A | N/A | N/A 50 MHz | N/A | N/A | |||||
Output | N/A | N/A | N/A Clipped Sinewave | N/A | N/A | |||||
Output Level | N/A | |||||||||
Maximum Harmonic and Subs | N/A | |||||||||
Sinewave Version Harmonics | N/A | |||||||||
Load | N/A | N/A | N/A 10 pF/10 kohm | N/A | N/A | |||||
Symmetry | N/A | N/A | N/A 50 % | N/A | N/A | |||||
Symmetry Tolerance (±) | N/A | N/A | N/A ±10 % | N/A | N/A | |||||
Note for Symmetry | N/A | N/A | N/A Squarewave Version | N/A | N/A | |||||
Maximum Nominal Frequency at 25 Degrees Celsius (ºC) Temperature Set Point | N/A | N/A | N/A | N/A | N/A 50 | |||||
Typical Phase Noise at 20 Megahertz (MHz) Static Nominal Frequency and 10 Hertz (Hz) Frequency Offset | N/A | |||||||||
Typical Frequency Stability (±) at -40 to +85 Degrees Celsius (ºC) Temperature1 | N/A 0.5 ppm1.0 ppm | N/A 100 ppm | N/A | N/A 5 ppm | N/A 2 ppm | |||||
Typical Frequency Stability (±) at -45 to 105 Degrees Celsius (ºC) Temperature2 | N/A | |||||||||
Typical Frequency Stability (±) at -55 to +125 Degrees Celsius (ºC) Temperature3 | N/A | |||||||||
Typical Frequency Stability (±) at -55 to +85 Degrees Celsius (ºC) Temperature | N/A 2.0 ppm | N/A | N/A | N/A | N/A | |||||
Typical Frequency Stability (±) at -55 to +95 Degrees Celsius (ºC) Temperature | N/A | |||||||||
Typical Frequency Stability (±) at -20 to +70 Degrees Celsius (ºC) Temperature | N/A | |||||||||
Typical Frequency Stability (±) at -40 to +85 Degrees Celsius (ºC) Temperature | N/A | |||||||||
Maximum Standard Acceleration Sensitivity | N/A | |||||||||
Maximum Frequency Versus Voltage at 5% Change (±) | N/A | |||||||||
Maximum Frequency Versus Load at 10% Change (±) | N/A | N/A 0.1 ppm | N/A | N/A | N/A 0.1 ppm | |||||
Minimum Electronic Frequency Control (±) | N/A | |||||||||
Maximum Aging Tolerance (±) for 1 Year | N/A | |||||||||
Maximum Aging Tolerance (±) for 10 Years | N/A | |||||||||
Typical Acceleration Sensitivity4 | N/A | N/A | N/A | N/A 0.07 ppb/g0.1 ppb/g0.5 ppb/g | N/A | |||||
Maximum Acceleration Sensitivity5 | N/A 0.7 ppb/g2.5 ppb/g | N/A 0.7 ppb/g2.5 ppb/g | N/A | N/A 0.09 ppb/g0.3 ppb/g0.8 ppb/g | N/A 0.07 ppb/g0.7 ppb/g | |||||
Maximum Frequency Versus Reflow after 24 Hour Recovery | N/A | |||||||||
Maximum Frequency Versus Voltage at ±5 Percent (%) | N/A | |||||||||
Maximum Frequency Versus Load Voltage at ±10 Percent (%) | N/A | |||||||||
Typical Voltage Control (±)6 | N/A | |||||||||
Typical Start-Up Time | N/A | |||||||||
Maximum Start-Up Time | N/A | |||||||||
Typical Phase Noise at 20 Megahertz (MHz) Static Nominal Frequency and 100 Hertz (Hz) Frequency Offset | N/A | |||||||||
Typical Phase Noise at 20 Megahertz (MHz) Static Nominal Frequency and 1000 Hertz (Hz) Frequency Offset | N/A | |||||||||
Typical Phase Noise at 20 Megahertz (MHz) Static Nominal Frequency and 10000 Hertz (Hz) Frequency Offset | N/A | |||||||||
Typical Phase Noise at 20 Megahertz (MHz) Static Nominal Frequency and 100000 Hertz (Hz) Frequency Offset | N/A | |||||||||
Typical Phase Noise (Static) at 20 Megahertz (MHz) Nominal Frequency and Floor Frequency Offset | N/A | |||||||||
Typical Phase Noise at 100 Megahertz (MHz) Static Nominal Frequency and 10 Hertz (Hz) Frequency Offset | N/A | |||||||||
Typical Phase Noise at 100 Megahertz (MHz) Static Nominal Frequency and 100 Hertz (Hz) Frequency Offset | N/A | |||||||||
Typical Phase Noise at 100 Megahertz (MHz) Static Nominal Frequency and 1000 Hertz (Hz) Frequency Offset | N/A | |||||||||
Typical Phase Noise at 100 Megahertz (MHz) Static Nominal Frequency and 10000 Hertz (Hz) Frequency Offset | N/A | |||||||||
Typical Phase Noise at 100 Megahertz (MHz) Static Nominal Frequency and 100000 Hertz (Hz) Frequency Offset | N/A | |||||||||
Typical Phase Noise at 10 Megahertz (MHz) Static Nominal Frequency and 10 Hertz (Hz) Frequency Offset | N/A | N/A -90 dBc/Hz | N/A | N/A -80 dBc/Hz | N/A -100 dBc/Hz | |||||
Typical Phase Noise at 10 Megahertz (MHz) Static Nominal Frequency and 100 Hertz (Hz) Frequency Offset | N/A | N/A -120 dBc/Hz | N/A | N/A -110 dBc/Hz | N/A -127 dBc/Hz | |||||
Typical Phase Noise at 10 Megahertz (MHz) Static Nominal Frequency and 1000 Hertz (Hz) Frequency Offset | N/A | N/A -140 dBc/Hz | N/A | N/A -135 dBc/Hz | N/A -150 dBc/Hz | |||||
Typical Phase Noise at 10 Megahertz (MHz) Static Nominal Frequency and 10000 Hertz (Hz) Frequency Offset | N/A | N/A -150 dBc/Hz | N/A | N/A -150 dBc/Hz | N/A -160 dBc/Hz | |||||
Typical Phase Noise at 10 Megahertz (MHz) Static Nominal Frequency and 100000 Hertz (Hz) Frequency Offset | N/A | N/A -155 dBc/Hz | N/A | N/A -160 dBc/Hz | N/A -165 dBc/Hz | |||||
Minimum Direct Current (DC) Supply Voltage | N/A | |||||||||
Typical Direct Current (DC) Supply Voltage | N/A | |||||||||
Maximum Direct Current (DC) Supply Voltage | N/A | |||||||||
Maximum Direct Current (DC) at Complementary Metal-Oxide-Semiconductor (CMOS) | N/A | |||||||||
Maximum Direct Current (DC) at Clipped Sinewave | N/A | |||||||||
Minimum Level at 3.3 Volt (V) Supply Voltage | N/A | |||||||||
Maximum Level at 3.3 Volt (V) Supply Voltage | N/A | |||||||||
Note for 3.3 Volt (V) Voltage Minimum Level | N/A | |||||||||
Minimum Symmetry of Metal-Oxide-Semiconductor (CMOS) | N/A | |||||||||
Typical Symmetry of Metal-Oxide-Semiconductor (CMOS) | N/A | N/A 50 % | N/A | N/A | N/A | |||||
Maximum Symmetry of Metal-Oxide-Semiconductor (CMOS) | N/A | N/A 60 % | N/A | N/A | N/A | |||||
Typical Load at 10 Kiloohm (kO) Resistance | N/A | N/A 10 pF | N/A | N/A | N/A | |||||
Minimum Sub-Harmonics Voltage | N/A | |||||||||
Typical Sub-Harmonics Voltage | N/A | |||||||||
Maximum Sub-Harmonics Voltage | N/A | |||||||||
Typical Load | N/A | N/A | N/A | N/A 15 pF | N/A | |||||
Minimum Symmetry | N/A 45 % | N/A | N/A | N/A 40 % | N/A | |||||
Typical Symmetry | N/A 50 % | N/A | N/A | N/A 50 % | N/A | |||||
Maximum Symmetry | N/A 55 % | N/A | N/A | N/A 60 % | N/A | |||||
Maximum Output Level at Clipped Sine | N/A | |||||||||
High-Density Complementary Metal-Oxide Semiconductor (HCMOS) Symmetry | N/A | |||||||||
Tolerance for High-Density Complementary Metal-Oxide Semiconductor (HCMOS) Symmetry | N/A | |||||||||
Rise/Fall Time | N/A | |||||||||
Temperature Range | N/A | |||||||||
Tolerance for -40 to +85 Degrees Celsius (ºC) Temperature Range | N/A | |||||||||
Option B57 | N/A | |||||||||
Option N16 | N/A | |||||||||
Option N26 | N/A | |||||||||
Option G27 | N/A | |||||||||
Option N37 | N/A | |||||||||
Option N57 | N/A | |||||||||
Option G17 | N/A | |||||||||
Option N17 | N/A | |||||||||
Option T27 | N/A | |||||||||
Option T37 | N/A | |||||||||
Option T57 | N/A | |||||||||
Option T16 | N/A | |||||||||
Option V36 | N/A | |||||||||
Option T38 | N/A | N/A | N/A Temperature Range: -40 to +85 ºC Tolerance: ±3 x 10-8 | N/A | N/A | |||||
Option T58 | N/A | N/A | N/A Temperature Range: -40 to +85 ºC Tolerance: ±5 x 10-8 | N/A | N/A | |||||
Option V16 | N/A | |||||||||
Option T36 | N/A | |||||||||
Note for Temperature Stability | N/A | N/A | N/A (fmax-fmin)/2xfmin; EFC at center of range. Trim effect ≤±0.1 ppm over 0 to vs EFC and temperature. Hysteresis not included. | N/A | N/A | |||||
Frequency Versus Supply | N/A | N/A | N/A ±1 x 10-7 for a 5% Change | N/A | N/A | |||||
Frequency Versus Input Voltage | N/A | |||||||||
Frequency Versus Load | N/A | |||||||||
Typical Short Term7 | N/A | |||||||||
Voltage Stability8 | N/A | |||||||||
Load Stability9 | N/A | |||||||||
Aging Per Year | N/A | N/A | N/A ±5 x 10-7 | N/A | N/A | |||||
Aging for 10 Years | N/A | |||||||||
Typical Aging Per Year at 10 Megahertz (MHz) Frequency | N/A | |||||||||
Typical Aging Per Year | N/A ±0.5 ppm | N/A | N/A | N/A | N/A | |||||
Aging Per Year after 14 Days Operation | N/A | |||||||||
Maximum Aging Per Year | N/A ±1 ppm | N/A | N/A | N/A ±1 ppm | N/A | |||||
Maximum Total Stability10 | N/A | |||||||||
Direct Current (DC) Input Supply Voltage | N/A | N/A | N/A +3.3 V5.0 V | N/A | N/A | |||||
Tolerance for Direct Current (DC) Supply Voltage | N/A | N/A | N/A ±5 % | N/A | N/A | |||||
Supply Current | N/A | |||||||||
Input Current | N/A | |||||||||
Maximum Input Current | N/A | N/A | N/A 25 mA | N/A | N/A | |||||
Supply Current for High-Density Complementary Metal-Oxide Semiconductor (HCMOS) | N/A | |||||||||
Supply Current for Sine | N/A | |||||||||
Note for Input Current | N/A | |||||||||
Warm Up Time in 10 Millisecond (ms) | N/A | |||||||||
10 Hertz (Hz) Frequency Offset | N/A | N/A | N/A -90 dBc/Hz | N/A | N/A | |||||
100 Hertz (Hz) Frequency Offset | N/A | N/A | N/A -120 dBc/Hz | N/A | N/A | |||||
1 Kilohertz (kHz) Frequency Offset | N/A | N/A | N/A -140 dBc/Hz | N/A | N/A | |||||
10 Kilohertz (kHz) Frequency Offset | N/A | N/A | N/A -150 dBc/Hz | N/A | N/A | |||||
100 Kilohertz (kHz) Frequency Offset | N/A | N/A | N/A -155 dBc/Hz | N/A | N/A | |||||
Note for Phase Noise | N/A | N/A | N/A Typical 10 MHz, CMOS | N/A | N/A | |||||
Standard (SD Option) Acceleration Sensitivity | N/A | N/A | N/A ≤2.5 x 10-9 /g | N/A | N/A | |||||
Available (LG Option) Acceleration Sensitivity | N/A | N/A | N/A ≤7 x 10-9 /g | N/A | N/A | |||||
Total Gamma G-Sensitivity | N/A | |||||||||
Positive Slope Typical Frequency Adjust | N/A | N/A | N/A ±7 ppm | N/A | N/A | |||||
Note for Frequency Adjustment | N/A | N/A | N/A Via 0 to Vsupply EFC | N/A | N/A | |||||
Typical Standard (SD Option) | N/A | |||||||||
Low G-Sensitivity Option (LG) | N/A | |||||||||
G-Sensitivity | N/A | |||||||||
Frequency Range | N/A | |||||||||
Small and Rugged Package | N/A | |||||||||
Wide Temperature Range | N/A | |||||||||
Tight Temperature Stability of (±) 1 ppm | N/A | |||||||||
Vibration |
N/A
Conditions MIL-STD-202 Method 214, Cond II-A Description 0.2 PSD, 6.21 gRMS |
N/A | N/A |
N/A
Standard - MIL-STD-202F Method, Condition - 214, I.F Description - 0.3 PSD, 20.71 g RMS, 3min/axis |
N/A
Standard - MIL-STD-883 Method, Condition - 2007, Cond A Description - 50 g, 20 to 2,000 Hz, swept sine |
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Random Vibration | N/A |
N/A
Standard - MIL-STD-202 Method, Condition - 214, Cond I-J Description - 1 PSD, 37.80 rms G |
N/A Per MIL-STD-202, Method 112, Condition I-J | N/A | N/A | |||||
Sine Vibration | N/A |
N/A
Standard - MIL-STD-202 Method, Condition - 204, Cond D Description - 20 g, 20 to 2,000 Hz, |
N/A Per MIL-STD-202, Method 204, Condition D | N/A | N/A | |||||
Shock |
N/A
Conditions MIL-STD-202 Method 213, Cond C Description 100 g, 11 ms duration, half-sine |
N/A
Standard - MIL-STD-202 Method, Condition - 213, Cond F Description - 1,500 g, 0.5 ms half-sine |
N/A Per MIL-STD-202, Method 213, Condition F |
N/A
Standard - MIL-STD-202F Method, Condition - 213, K Description - 30 g peak, sawtooth, 11 ms |
N/A
Standard - MIL-STD-883 Method, Condition - 2002, Cond B Description - 1,500 g, 0.5 ms half-sine |
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Storage Temperature Range | N/A | N/A | N/A -55 to +95 ºC | N/A | N/A | |||||
Fine Leak |
N/A
Conditions MIL-STD-202 Method 213, Cond C |
N/A | N/A | N/A | N/A | |||||
Note for Environmental | N/A | |||||||||
Input Voltage | N/A | |||||||||
Ordering Example | N/A | N/A |
N/A
T1221-T58-3.3-10 MHz (Model-Stability-Input V-Frequency) |
N/A | N/A | |||||
Pad Connections | N/A | |||||||||
Pin Configuration | N/A | N/A | N/A Pin 1 - EFC Pin 14 - Input Voltage Pin 7 - 0 V and Case Gnd Pin 8 - Output | N/A | N/A | |||||
Electronic Frequency Control (EFC) Characteristics | N/A | |||||||||
Industry Standards | N/A | |||||||||
Voltage Control | N/A | N/A | N/A +/-5ppm | N/A | N/A | |||||
Operating Temperature Range | N/A | |||||||||
Terminal Finish | N/A Gold plated (E) is standard. SnPb 63/37 (PB) and SnAg (LF) also available | N/A SnAg Std, SnPb (PB) is available | N/A | N/A Electroless Nickel Immersion Gold (ENIG) | N/A Electroless Nickel Immersion Gold (ENIG) std. SnPb 63/37 (non-RoHS) available | |||||
Package Weight | N/A 0.5 g | N/A 3 g | N/A | N/A 3 g | N/A 3 g | |||||
Temperature Stability to ±50 Parts Per Billion (pbb) | N/A | |||||||||
Rugged Package | N/A | |||||||||
Soldering Instruction | N/A Reflow | N/A Solder by hand | N/A | N/A Reflow | N/A Reflow | |||||
Shipping | N/A T and R Tray Pack | N/A Tray package | N/A | N/A Tray pack and Tape & Reel | N/A Tray pack and Tape & Reel | |||||
Sizes Dimensions Details (SMT) Compact Package | N/A | |||||||||
Low Phase Noise at 10 KiloHertz (KHz) Offset Frequency | N/A | |||||||||
Direct Current (DC) Supply Voltage | N/A | |||||||||
Operating Temperature | N/A -55 to 95 ºC | N/A -40 to 85 ºC | N/A | N/A -40 to 85 ºC | N/A -40 to 85 ºC | |||||
Storage Temperature | N/A -55 to 125 ºC | N/A -55 to 95 ºC | N/A | N/A -55 to 105 ºC | N/A -45 to 90 ºC | |||||
Marking |
N/A
Line 1: Greenray logo Line 2: Model Line 3: Frequency Line 4: Serial Number + Date Code (YYWW) |
N/A
Line 1: Greenray logo + Model Line 2: Frequency Line 3: Serial number + Data code (YYWW) |
N/A |
N/A
Line 1: Greenray logo + Model Line 2: Frequency Line 3: Serial Number Line 4: Data Code (YYWW) |
N/A
Line 1: Greenray logo Line 2: Model Line 3: Frequency Line 4: Serial Number Line 5: Data code (YYWW) |
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Maximum Reflow Shift (±)11 | N/A | |||||||||
Minimum Direct Current (DC) Supply Voltage Drain to Drain (VDD) | N/A | N/A 3.0 V4.75 V | N/A | N/A 3.0 V4.75 V | N/A 3.0 V4.75 V | |||||
Typical Direct Current (DC) Supply Voltage Drain to Drain (VDD) | N/A | N/A 3.3 V5.0 V | N/A | N/A 3.3 V5.0 V | N/A 3.3 V5.0 V | |||||
Maximum Direct Current (DC) Supply Voltage Drain to Drain (VDD) | N/A | N/A 3.6 V5.25 V | N/A | N/A 3.6 V5.25 V | N/A 3.6 V5.25 V | |||||
Maximum Supply Current | N/A | N/A 25 mA | N/A | N/A 30 mA | N/A 30 mA | |||||
Minimum Symmetry for Low Voltage Positive Emitter-Couple Logic (LVPECL) | N/A | |||||||||
Typical Symmetry for Low Voltage Positive Emitter-Couple Logic (LVPECL) | N/A | |||||||||
Maximum Symmetry for Low Voltage Positive Emitter-Couple Logic (LVPECL) | N/A | |||||||||
Typical Load for Low Voltage Positive Emitter-Couple Logic (LVPECL) | N/A | |||||||||
Minimum Level | N/A | N/A 0.8 Vpp | N/A | N/A | N/A | |||||
Maximum Level | N/A | |||||||||
Package | N/A Ceramic + Metal Lid | N/A | N/A | N/A | N/A | |||||
Package Finish | N/A | |||||||||
Minimum Nominal Frequency at +25 Degrees Celsius (ºC) Temperature Set Point | N/A | |||||||||
Maximum Nominal Frequency at +25 Degrees Celsius (ºC) Temperature Set Point | N/A | |||||||||
Typical Frequency Stability (±) at-20 to +70 Degrees Celsius (ºC) Temperature | N/A | |||||||||
Typical Frequency Stability (±) at-40 to +85 Degrees Celsius (ºC) Temperature | N/A | |||||||||
Typical Frequency Stability (±) at-55 to +95 Degrees Celsius (ºC) Temperature | N/A 3.0 ppm | N/A | N/A | N/A | N/A | |||||
Note for Frequency Stability | N/A | |||||||||
Typical Aging for 1 Year Tolerance (±) at 10 Megahertz (MHz) Frequency | N/A | |||||||||
Maximum Aging for 1 Year Tolerance (±) at 10 Megahertz (MHz) Frequency | N/A | |||||||||
Typical Electronic Frequency Control (±) | N/A | N/A 7 ppm | N/A | N/A 5 ppm | N/A 7 ppm | |||||
Typical Load at Complementary Metal-Oxide-Semiconductor (CMOS) | N/A 15 pF | N/A 15 pF | N/A | N/A | N/A 15 pF | |||||
Minimum Nominal Frequency at Complementary Metal-Oxide-Semiconductor (CMOS) Squarewave | N/A | |||||||||
Maximum Nominal Frequency at Complementary Metal-Oxide-Semiconductor (CMOS) Squarewave | N/A | |||||||||
Typical Frequency Stability (±) at -20 to +85 Degrees Celsius (ºC) Temperature | N/A | |||||||||
Maximum Input Current for Metal-Oxide-Semiconductor (CMOS) | N/A | |||||||||
Maximum Input Current for Clipped Sinewave | N/A | |||||||||
Maximum Warm-Up Time12 | N/A | N/A 10 ms | N/A | N/A | N/A 10 ms | |||||
Minimum Level at 5.0 Volt (V) Supply Voltage | N/A | |||||||||
Maximum Level at 5.0 Volt (V) Supply Voltage | N/A | |||||||||
Radiation | N/A | |||||||||
Maximum Frequency Versus Voltage for a 2 Percent (%) Change (±) | N/A 0.3 ppm | N/A | N/A | N/A | N/A | |||||
Note for Typical Electronic Frequency Control | N/A | |||||||||
Maximum Short Term for a 1 Second Tau | N/A | |||||||||
Minimum Direct Current (DC) Supply Voltage Drain to Drain (VDD) at ± 5% | N/A 2.7 V4.75 V | N/A | N/A | N/A | N/A | |||||
Typical Direct Current (DC) Supply Voltage Drain to Drain (VDD) at ± 5% | N/A 3.3 V5.0 V | N/A | N/A | N/A | N/A | |||||
Maximum Direct Current (DC) Supply Voltage Drain to Drain (VDD) at ± 5% | N/A 3.6 V5.25 V | N/A | N/A | N/A | N/A | |||||
Maximum Supply Current at Complementary Metal-Oxide-Semiconductor (CMOS) | N/A | |||||||||
Minimum Symmetry at Complementary Metal-Oxide-Semiconductor (CMOS) | N/A | N/A | N/A | N/A | N/A 40 % | |||||
Maximum Symmetry at Complementary Metal-Oxide-Semiconductor (CMOS) | N/A | N/A | N/A | N/A | N/A 60 % | |||||
Maximum Package Weight | N/A | |||||||||
Typical Frequency Stability (±) at 0 to +50 Degrees Celsius (ºC) Temperature | N/A | |||||||||
Typical Frequency Stability (±) at -20 to +50 Degrees Celsius (ºC) Temperature | N/A | |||||||||
Note for Expenditure Finance Committee (EFC) is Equal to Supply to 0, Negative Slope | N/A | |||||||||
Typical Short Term for a 1 Second Tau | N/A | |||||||||
Typical Phase Noise at 20 Megahertz (MHz) Static Nominal Frequency and 1000000 Hertz (Hz) Frequency Offset | N/A | |||||||||
Minimum Level (1) (+) at 3.3 Volts (V) Supply Voltage | N/A | |||||||||
Maximum Level (0) (+) at 3.3 Volts (V) Supply Voltage | N/A | |||||||||
Minimum Level (1) at 5.0 Volts (V) Supply Voltage | N/A | |||||||||
Maximum Level (0) at 5.0 Volts (V) Supply Voltage | N/A | |||||||||
Typical Symmetry at Complementary Metal-Oxide-Semiconductor (CMOS) | N/A | N/A | N/A | N/A | N/A 50 % | |||||
Typical Sinewave Load | N/A | |||||||||
Typical Sinewave Output Power | N/A | |||||||||
Typical Sinewave Harmonics | N/A | |||||||||
Maximum Sinewave Harmonics | N/A | |||||||||
Typical Frequency Stability (±) at -20 to +70 Degrees Celsius (ºC) Temperature | N/A | N/A 50 ppm | N/A | N/A 3 ppm | N/A 1 ppm | |||||
Typical Frequency Stability (±) at -40 to +70 Degrees Celsius (ºC) Temperature | N/A | |||||||||
Maximum Acceleration Sensitivity (±) at (Note 1) | N/A | |||||||||
Note for Maximum Acceleration Sensitivity | N/A | |||||||||
Maximum Frequency Versus Voltage for a 5 Percent (%) Change (±) | N/A | N/A 0.1 ppm | N/A | N/A 0.3 ppm | N/A 1 ppm | |||||
Maximum Frequency Versus Load for a 5% Change (±) | N/A | N/A | N/A | N/A 0.1 ppm | N/A | |||||
Note for Typical Electronic Frequency Control (±) | N/A | |||||||||
Typical Phase Noise (Static) at 10 Megahertz (MHz) Nominal Frequency and Floor Frequency Offset | N/A | N/A | N/A | N/A | N/A -168 dBc/Hz | |||||
Maximum Rise/Fall Time | N/A 4 ns | N/A | N/A | N/A 10 ns | N/A | |||||
Minimum Level at 15 Power Factor (pF) Load | N/A VDD-0.3 "1" Level | N/A | N/A | N/A VDD-0.2 V "1" Level | N/A | |||||
Maximum Level at 15 Power Factor (pF) Load | N/A 0.3 "0" Level | N/A | N/A | N/A +0.2 V "0" Level | N/A | |||||
Minimum Direct Current (DC) Supply Voltage at ± 5% | N/A | |||||||||
Typical Direct Current (DC) Supply Voltage at ± 5% | N/A | |||||||||
Maximum Direct Current (DC) Supply Voltage at ± 5% | N/A | |||||||||
Typical Frequency Stability (±) at 10 to 60 Degrees Celsius (ºC) Temperature | N/A | |||||||||
Maximum Aging Per Year at 10 Megahertz (MHz) Frequency | N/A | |||||||||
Minimum Load | N/A | |||||||||
Maximum Load | N/A | |||||||||
Maximum Rise/Fall Time at 15 Power Factor (pF) Load | N/A | |||||||||
Minimum Output Voltage13 | N/A 0.3 Vpp | N/A | N/A | N/A | N/A | |||||
Typical Output Voltage14 | N/A 10 Vpp | N/A | N/A | N/A | N/A | |||||
Minimum Differential Output Voltage15 | N/A 250 mV | N/A | N/A | N/A | N/A | |||||
Minimum Nominal Frequency | N/A 0.75 MHz10 MHz20 MHz | N/A 10 MHz | N/A | N/A 50 MHz | N/A | |||||
Maximum Nominal Frequency | N/A 150 MHz50 MHz800 MHz | N/A 50 MHz | N/A | N/A 100 MHz | N/A | |||||
Typical Aging for 10 Years | N/A ±4 ppm | N/A | N/A | N/A | N/A | |||||
Maximum Aging for 10 Years | N/A ±6 ppm | N/A | N/A | N/A | N/A | |||||
Maximum Aging for 20 Years | N/A ±10 ppm | N/A | N/A | N/A | N/A | |||||
Note for Supply Voltage | N/A +5.0V supply is only available for CS and CL outputs from 10 MHz to 50 MHz | N/A | N/A | N/A | N/A | |||||
Maximum Supply Current at Complementary Metal-Oxide-Semiconductor (CMOS) and Clipped Sine | N/A 6 mA | N/A | N/A | N/A | N/A | |||||
Maximum Supply Current at Complementary Metal-Oxide-Semiconductor (CMOS) and 750 Kilohertz (KHz) to 150 Megahertz (MHz) Frequency | N/A 45 mA | N/A | N/A | N/A | N/A | |||||
Maximum Supply Current for Low-Voltage Differential Signaling (LVDS) | N/A 65 mA | N/A | N/A | N/A | N/A | |||||
Maximum Supply Current for Low-Voltage Positive/Pseudo Emitter-Coupled Logic (LVPECL) | N/A 80 mA | N/A | N/A | N/A | N/A | |||||
Typical Rise/Fall Time | N/A 2.4 ns | N/A | N/A | N/A | N/A | |||||
Typical Differential Output Voltage | N/A 350 mV | N/A | N/A | N/A | N/A | |||||
Maximum Differential Output Voltage | N/A 450 mV | N/A | N/A | N/A | N/A | |||||
Minimum Offset Voltage for Low-Voltage Differential Signaling (LVDS) | N/A 1.125 V | N/A | N/A | N/A | N/A | |||||
Typical Offset Voltage for Low-Voltage Differential Signaling (LVDS) | N/A 1.250 V | N/A | N/A | N/A | N/A | |||||
Maximum Offset Voltage for Low-Voltage Differential Signaling (LVDS) | N/A 1.375 V | N/A | N/A | N/A | N/A | |||||
Typical Rise/Fall Time for Low-Voltage Differential Signaling (LVDS) | N/A 0.8 ns | N/A | N/A | N/A | N/A | |||||
Maximum Rise/Fall Time for Low-Voltage Differential Signaling (LVDS) | N/A 1.5 ns | N/A | N/A | N/A | N/A | |||||
Minimum Symmetry for Low-Voltage Differential Signaling (LVDS) | N/A 45 % | N/A | N/A | N/A | N/A | |||||
Typical Symmetry for Low-Voltage Differential Signaling (LVDS) | N/A 50 % | N/A | N/A | N/A | N/A | |||||
Maximum Symmetry for Low-Voltage Differential Signaling (LVDS) | N/A 55 % | N/A | N/A | N/A | N/A | |||||
Minimum Output Voltage for Low-Voltage Positive/Pseudo Emitter-Coupled Logic (LVPECL) | N/A VDD-1.025 "1" level V | N/A | N/A | N/A | N/A | |||||
Maximum Output Voltage for Low-Voltage Positive/Pseudo Emitter-Coupled Logic (LVPECL) | N/A VDD-1.620 "0" level V | N/A | N/A | N/A | N/A | |||||
Maximum Rise/Fall Time for Low-Voltage Positive/Pseudo Emitter-Coupled Logic (LVPECL) | N/A 0.7 ns | N/A | N/A | N/A | N/A | |||||
Minimum Symmetry for Low-Voltage Positive/Pseudo Emitter-Coupled Logic (LVPECL) | N/A 45 % | N/A | N/A | N/A | N/A | |||||
Typical Symmetry for Low-Voltage Positive/Pseudo Emitter-Coupled Logic (LVPECL) | N/A 50 % | N/A | N/A | N/A | N/A | |||||
Maximum Symmetry for Low-Voltage Positive/Pseudo Emitter-Coupled Logic (LVPECL) | N/A 55 % | N/A | N/A | N/A | N/A | |||||
Benefits | N/A | |||||||||
Applications |
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Features |
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Note for Nominal Frequency | N/A |
N/A
CMOS Squarewave Clipped Sinewave |
N/A | N/A CMOS Square Wave | N/A | |||||
Maximum Aging Per Year After 14 Days Operation | N/A | N/A ±0.5 ppm | N/A | N/A | N/A ±1 ppm | |||||
Minimum Level at 15 Power Factor (pF) Load and 3.3 Volt (V) Voltage | N/A | N/A +2.8 V "1" Level | N/A | N/A | N/A +2.8 V "1" Level | |||||
Maximum Level at 15 Power Factor (pF) Load and 3.3 Volt (V) Voltage | N/A | N/A +0.2 V "0" level | N/A | N/A | N/A +0.2 V "1" Level | |||||
Minimum Level at 15 Power Factor (pF) Load and 5 Volt (V) Voltage | N/A | N/A +4.5 V "1" Level | N/A | N/A | N/A +4.5 V "1" Level | |||||
Maximum Level at 15 Power Factor (pF) Load and 5 Volt (V) Voltage | N/A | N/A +0.2 V "0" level | N/A | N/A | N/A +0.2 V "1" Level | |||||
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